Aging Modeling and Simulation of the Gate Switching Instability Degradation in SiC MOSFETs

  1. García Meré, Juan Ramón 1
  2. Gómez Gómez, Alexis Anselmo 1
  3. Roig, Jaume
  4. Rodríguez Méndez, Juan 1
  5. Rodríguez Alonso, Alberto 1
  1. 1 Universidad de Oviedo

    Universidad de Oviedo

    Oviedo, España


2024 IEEE Applied Power Electronics Conference and Exposition (APEC)

Publisher: IEEE

Year of publication: 2024

Congress: Applied Power Electronics Conference and Exposition (2024. Long Beach, USA)

Type: Conference paper


In order to conduct proper reliabilityinvestigations, aging models of silicon carbide (SiC) MOSFETsare needed to assess the possible effect that the degradation ofthese devices may have on the existing power electronicsystems. These models should be able to accurately describethe long-term behavior of SiC MOSFETs. It has been recentlydiscovered that (Gate Switching Instability) GSI is one of themost influential degradation processes. This work proposes thedefinition of a new model to describe the threshold voltagedrift of SiC MOSFETs under GSI, from which a compactcomputational model is proposed to mimic this phenomenon. Anew methodology is proposed to calibrate this computationalaging model using experimental data, along with itsextrapolation to a generic set of usage conditions. Compared toother proposed approaches, this model attempts to add newcapabilities, such as the variation in the threshold voltage driftwhen using different application-related parameters (e.g.,driving voltage and gate resistor).

Funding information

This work was supported in part by Ministerio de Ciencia e Innovación, by Agencia Estatal de Investigación and by FEDER under Project PID2022-136969OB-I00, and in part by the Principality of Asturias under “Severo Ochoa” Program Grants no. BP20-181 and BP21-114 and under Project SV-PA-21-AYUD/2021/51931.