Deep Investigation on SiC MOSFET Degradation under Gate Switching Stress and Application Switching Stress

  1. Gómez Gómez, Alexis Anselmo 1
  2. García Meré, Juan Ramón 1
  3. Rodríguez Alonso, Alberto 1
  4. Rodríguez Méndez, Juan 1
  5. Jiménez, Carlos
  6. Roig, Jaume
  1. 1 Universidad de Oviedo
    info

    Universidad de Oviedo

    Oviedo, España

    ROR https://ror.org/006gksa02

Actes:
2024 IEEE Applied Power Electronics Conference and Exposition (APEC)

Editorial: IEEE

Any de publicació: 2024

Congrés: Applied Power Electronics Conference and Exposition (2024. Long Beach, USA)

Tipus: Aportació congrés

GOOGLE SCHOLAR lock_openRUO editor

Resum

This work compares Silicon Carbide (SiC) MOSFET electrical degradation, with special focus on the threshold voltage, under Gate Switching Stress (GSS) and Application Switching Stress (ASS) tests. For this purpose, a dedicated setup has been developed and utilized to dynamically stress devices under different conditions. Remarkably, the degradation differs between GSS and ASS, thus being more pronounced in the latter case. An explanation based on TCAD simulation analysis is provided along with a methodology to adapt GSS testing to obtain hard-switching real application results.

€ Mostra el finançament

Informació de finançament

This work was financed by grants BP21-114 and BP20-181 from the Principado de Asturias, and projects MCIU-22-PID2021-127707OB-C21 and MCINN-22-TED2021-130939B-I00 from the Spanish Ministry of Science and Innovation.

Finançadors